Graphics display system using logic-enhanced pixel memory cells
Patent Number: 4,590,465
Date of Patent: May 20, 1986
Inventor: Henry Fuchs (Pittsboro, N.C.)
Assignee: The University of North Carolina at Chapel Hill, Chapel Hill, N.C.
Appl. No.: 349,818
Filed: Feb. 18, 1982
Int. Cl.: G09G 1/00
U.S. Cl.: 340/723
54 Claims
Abstract
The present invention provides a relatively inexpensive raster-scan type graphics system capable of real-time operation, utilizing logic-enhanced pixels within an image buffer, permitting parallel (simultaneous) calculations at every pixel. A typical implementation would be as custom VLSI chips. In the sequence of most general applications, each polygon is operated upon in sequence, and the image is built up as the polygons are processed without the necessity of sorting. With respect to each successive polygon, the following operations are effected: (1) all pixels within the polygon are identified; (2) the respective pixels which would be visible to the observer, that is, not obstructed by some previously processed polygon, are determined; and (3) the proper color intensities for each visible pixel are determined.