Device Registers
A device is associated with several device registers, which in the LSI 11 are accessible as part of the physical memory. In the 11/2 the last 8K of addresses are used to name these registers. While these registers appear to a process as part of real memory, they are actually part of the device. They are used for four purposes:
To transmit control information from the cpu to a device.
To transmit status information from a device to the cpu.
To transfer output data from cpu to a device.
To transfer input data from a device to the cpu.
These four functions need not be served by four different registers. For instance, in the LSI 11, the control and status information of the terminal device are stored in one register. Moreover, not all devices provide both output and input registers. For instance a cardreader is associated only with an input register.
The device registers are assigned contiguous addresses.
We shall call the lowest of these the device address of the device.
The address of any device register can be computed from this address.
Polling vs Interrupts
The cpu needs some mechanism to determine when an I/O operation completes. Two mechanisms are provided: polling and interrupts. Polling means checking the status information of all busy devices periodically to see if the operation has completed. (A ready bit determines if a device has completed an operation or not.) Polling has the disadvantage of busy waiting.
Because polling is time consuming, it is more common to request the device to cause an interrupt instead when the device becomes ready. In the 11/2 an interrupt causes the following:
The current PC and PS are pushed on the stack.
A new PC and PS are loaded from an area in memory called the interrupt vector of the device. This area is addressed by the interrupt vector address of the device. In the 11/2 addresses from 0 to 0777 are used for interrupt vectors.
The code addressed by the new PC is executed. This code, called the interrupt handler of the device, eventually returns control to the place at which the user's program was interrupted.
Some devices may be
associated with separate input interrupt vectors and
output interrupt vectors.
Such devices may be associated with distinct input handlers and output
handlers that
may be used to provide separate handling of input and output.
We shall see later how the input and output interrupt vectors of a device are
initialized.