Serial Line Unit
From the computer's point of view the terminal device consists of a serial line unit (SLU) attached to the system bus. A cpu may have more than one such unit attached to it. Each SLU is connected to a terminal via a cable consisting of three wires: one carries data from the transmitter of a terminal to the receiver of the device, another carries data from the transmitter of the SLU to the receiver of the terminal, and the third provides an electrical ground.
Signals on data wires consist of a series of positive or negative pulses corresponding to the 1's and 0's being transmitted. They are serial because they travel down the wire one bit at a time, and asynchronous because the transmitter sends a character whenever one is available; there is no synchronization between the transmitter and receiver to control the start of a character.
In order to permit the receiver to recognize the start of a character, a start bit is transmitted directly before each character. To improve reliability one or two stop bits are sent directly after each character. A character may be prefixed by a parity bit for error detection purposes.
Errors occur when the receiver cannot make sense out of the signals it receives.
A framing error occurs when
a receiver's samples of a pulse contain both 1's and 0's.
Character overrun errors occur when the CPU does not extract a character from
a receiver before another is received.
A break error occurs when the line remains idle in the wrong state for an
extended period (greater than the time required to transmit a character).
Receivers report break errors as framing error.
Some systems use the break condition to trigger special handling.
For example,
the 11/2 can be wired so breaks on the console terminal line cause the processor to
halt.
The Xinu downloader uses this mechanism to gain control of the system.
Device Registers
An SLU is associated with four 16-bit device registers: the receiver control and status register (RCSR), the received data buffer (RBUF), the transmitter control and status register (XCSR), and the transmitted data buffer (XBUF). The higher bytes of all registers except RBUF are unused.
The XBUF register is used to output data to a terminal. Writing a character to the XBUF register address causes the SLU to capture the character and start transmitting it on the serial output line.
The RBUF register is used for receiving input data. The CPU reads from the RBUF address to retrieve a received character. The low-order byte of the register contains the character and the higher order byte is used to indicate overflow, framing, and parity errors (see section 2.1.10 in the text). Accessing the register has the side effect of clearing the receiver and enabling it to receive the next character.
RCSR is used to control the receiver and receive status information from it. Only two bits of the register are used: bit 6 is the interrupt bit and bit 7 is the ready bit. If the interrupt bit is set, the SLU will post an interrupt when a character is received. The ready bit is set by the SLU when a character has been received and is ready for the CPU to access it. This bit may be used for polled input.
XCSR is similar to RCSR;
it contains a ready bit and an interrupt bit.
The ready bit is set when the transmitter finishes transmission of a character and is
ready to receive another.
This bit may be used for polled output.
If the interrupt bit is on, an interrupt is posted when the transmitter is ready.
In addition to these two bits,
XCSR also contains a break bit.
When this bit is set to 1,
the transmitter forces the output line into a break condition.