Publications from the Fast Links project

• Dally, William J., and Poulton, John W., "Digital Systems Engineering", Cambridge University Press, 1998,
  Digital Systems Engineering Home Page

  Dally, W., M. Lee, F, An, J. Poulton, and S. Tell, "High Performance Electrical Signaling", MPPOI98, 1998.

  [postscript, 513Kb] [gzip'ed postscript, 118Kb] [PDF, 109Kb]

  Dally, W., M. Lee, F, An, and J. Poulton, "A Small Low-Power High-Speed Link", IEEE/LEOS Ninth Workshop on Interconnections within High-Speed Digital Systems, May 18, 1998.

  Dally, W., J. Poulton, and S. Tell, "Multi-gigabit signaling with CMOS", IEEE/LEOS Eighth Workshop on Interconnections within High-Speed Digital Systems, May 12, 1997.

  [Slides, postscript, 9MB] [gzip'ed postscript, 786K]

  Dally, W. and J. Poulton, "Transmitter Equalization for 4 Gb/s signaling," IEEE Micro Jan/Feb 1997, pp48-56.

  [Abstract]

  Dally, W. and J. Poulton, "Transmitter Equalization for 4 Gb/s signaling," Hot Interconnects '96. This paper was slightly revised and reprinted by IEEE Micro as the preceding item.

  J. Poulton, Dally, W. and Tell, S. "A Tracking Clock Recovery Receiver for 4 Gb/s signaling," IEEE Micro Jan/Feb 1998, pp15-26. This is a condensed version of the Hot Interconnects '97 presentation.

  [Abstract]

  J. Poulton, Dally, W. and Tell, S. "A Tracking Clock Recovery Receiver for 4 Gb/s signaling," Presented at Hot Interconnects '97, August 21-23, 1997, Palo Alto, CA.

  [Abstract]