# Programming

Programming

Questions?

## Instructions

• Language of the Machine

• More primitive than higher level languages e.g., no sophisticated control flow

• Very restrictive e.g., MIPS Arithmetic Instructions

We’ll be working with the MIPS instruction set architecture similar to other architectures developed since the 1980's

Design goals: maximize performance and minimize cost, reduce design time

## MIPS arithmetic

• All instructions have 3 operands

• Operand order is fixed (destination first)

C code: A = B + C
MIPS code: add \$s0, \$s1, \$s2 (associated with variables by compiler)

## MIPS arithmetic

• Design Principle: simplicity favors regularity. Why?

• Of course this complicates some things...

C code:

```A = B + C + D;
E = F - A;```

MIPS code:

```  add \$t0, \$s1, \$s2
sub \$s4, \$s5, \$s0
```
• Operands must be registers, only 32 registers provided

• Design Principle: smaller is faster. Why?

## Registers versus Memory

• Arithmetic instructions operands must be registers,
— only 32 registers provided

• Compiler associates variables with registers

• What about programs with lots of variables?

## Memory Organization

• Viewed as a large, single-dimension array.

• A memory address is an index into the array

• "Byte addressing" means that the index points to a byte of memory.

## Instructions

• Example:

• C code:

A[8] = h + A[8];

• MIPS code:

```    lw \$t0, 32(\$s3)
sw \$t0, 32(\$s3)
```
• Store word has destination last

• Remember arithmetic operands are registers, not memory!

## So far we've learned

```add \$s1, \$s2, \$s3  # s1 = s2 + s3
sub \$s1, \$s2, \$s3  # s1 = s2 – s3
lw \$s1, 100(\$s2)   # s1 = Memory[s2+100]
sw \$s1, 122(\$s2)   # Memory[s2+122] = s1
```

## Machine Language

• Instructions, like registers and words of data, are also 32 bits long

• Example:  add \$t0, \$s1, \$s2

• registers have numbers, \$t0=8, \$s1=17, \$s2=18

• Instruction Format:

 R-Format op rs rt rd shamt funct 6 bits 5 bits 5 bits 5 bits 5 bits 6 bits 000000 10001 10010 01000 00000 100000

## Machine Language

• Consider the load-word and store-word instructions,

• - What would the regularity principle have us do? - New principle: Good design demands a compromise

• Introduce a new type of instruction format

• - I-type for data transfer instructions - other format was R-type for register

Example: lw \$t0, 32(\$s2)

 I-format op rs rt 16 bit number 35 18 9 32

Where's the compromise?

## Stored Program Concept

• Instructions are bits

• Programs are stored in memoryto be read or written just like data

• Fetch & Execute Cycle

• Instructions are fetched and put into a special register

• Bits in the register "control" the subsequent actions

• Fetch the “next” instruction and continue

## Control

• Decision making instructions alter the control flow, i.e., change the "next" instruction to be executed

• MIPS conditional branch instructions:

```bne \$t0, \$t1, Label
beq \$t0, \$t1, Label```

Example: if (i==j) h = i + j;

```bne \$s0, \$s1, Label
Label:  ....
```

## Control

• MIPS unconditional branch instructions:

j  label

Example:

```if (i!=j)
h=i+j;
else
h=i-j;
```
```beq \$s4, \$s5, Lab1
j Lab2
Lab1: sub \$s3, \$s4, \$s5
Lab2: ...
```

## So far

```add \$s1,\$s2,\$s3   # \$s1 = \$s2 + \$s3
sub \$s1,\$s2,\$s3   # \$s1 = \$s2 – \$s3
lw \$s1,100(\$s2)   # \$s1 = Memory[\$s2+100]
sw \$s1,100(\$s2)   # Memory[\$s2+100] = \$s1
bne \$s4,\$s5,Label # Next instr. is at Label if \$s4 != \$s5
beq \$s4,\$s5,Label # Next instr. is at Label if \$s4 = \$s5
j Label           # Next instr. is at Label
```
 R-Format op rs rt rd shamt funct I-Format op rs rt 16 bit address J-Format op 26 bit address

## Control Flow

• We have: beq, bne, what about Branch-if-less-than?

• New instruction: slt \$t0, \$s1, \$s2

```if  \$s1 < \$s2 then
\$t0 = 1
else
\$t0 = 0
```
• Can use this instruction to build blt \$s1, \$s2, Label

• — can now build general control structures

• Note that the assembler needs a register to do this,

• — there are policy of use conventions for registers

## Cultural Highlight

last edited 2005-09-08 14:31:01 by GaryBishop