COMP 290-81, Readings in Graphics Architectures

Fall 2000

Class: Thursdays 3:30, SN115

Mary Whitton
SN207
whitton@cs.unc.edu
962-1950

Anselmo Lastra
SN 256
lastra@cs.unc.edu
962-1958
Office Hours: M 2-3, Th 10-11.


** NEW:

Other


Class Schedule

 

 

Readings: 

IEEE Tutorial: Computer Graphics Hardware (Reading Room Reserve Shelf), Introduction to Chapter 3: Frame Buffer Design,   pp. 107-115 (if  the memory organization ideas in figures 3.5-3.8 are overwhelming, they each appear in slightly different form in the two papers that follow in this book).

Ars Technica RAM Guide, Part III: DDR DRAM and RAMBUS (If you're unfamiliar with basic DRAM operation, you might want to look at parts 1 and 2)

Additional Background Reading: Foley, Van Dam, Feiner, and Hughes, pp.  166-170 and pp.  855-861.

Pomegranate: a fully scalable graphics architecture, Matthew Eldridge, Homan Igehy and Pat Hanrahan, SIGGRAPH 2000 (PDF from ACM web site).

Talisman: Commodity realtime 3D graphics for the PC, Jay Torborg and James T. Kajiya, SIGGRAPH96 (PDF from ACM web site).

Dachille and Kaufman, GI-Cube: An Architecture for Volumetric Global Illumination and Rendering (PDF)

  1. Radeon SDK Highlights
  2. Tom's Hardware Guide - Benchmarking
  3. Tom's Hardware Guide - Radeon
  4. AGP information.
  5. Radeon specs and links.
  1. GeForce2 GTS stats
  2. GeForce 256 performance issues
  3. X-box
  4. NVIDIA Shading Rasterizer
  5. Developer Relations Site -- Presentations/GeForce 256 Overview, Programming Resources/NV_vertex_program Extension Specification and Slides, Presentations/GeForce 256 Register Combiners, White Papers/A Practical and Robust Bump-mapping Technique, Demos/Per-Pixel Lighting in OpenGL, Demos/"Per-Pixel Lighting using Register Combiners in OpenGL".

http://www.bops.com/literature/articles.shtml

Most important, but not on the web page (Ben will try to get a copy): Mike Strauss, Marco Jacobs, Ivan Greenberg, "BOPS: Conquering the Geometry Pipeline," Proceedings of Game Developers Conference 2000, San Jose, CA, USA, March 8 - 12, 2000.

Others:

Bruce Schulman and Gerald G. Pechanek, "A 90k gate "CLB" for Parallel Distributed Computing," Proceedings of EHPC.

Gerald G. Pechanek, Charles Kurak and Bruce Schulman, "Design of MPEG-2 Function with Embedded ManArray Cores," Proceedings of DesignCon 2000, Jan. 31-Feb. 3, 2000.

Gerald G. Pechanek, Stamatic Vassiliadis and Nikos P. Pitsianis, "ManArray Interconnection Network: An Introduction," Proceedings of EuroPar '99 Parallel Processing, Lecture Notes In Computer Science Vol 1685, pg 7610765, Toulouse, France, Aug. 31 - Sept. 3, 1999.

Nikos P. Pitsianis and Gerald G. Pechanek, "High-Performance FFT Implementation on the BOPS ManArray Parallel DSP," Advanced Signal Processing Algorithms, Architectures and Implementations IX, Volume 3807, pg 164-171 SPIE International Symposium, Denver, Co, USA, July 1999.

Wolfgang Heidrich and Hans-Peter Seidel. Realistic, Hardware-Accelerated Shading and Lighting, Proceedings of SIGGRAPH 99.

Wolfgang Heidrich, Katja Daubert, Jan Kautz, and Hans-Peter Seidel, Illuminating Micro Geometry Based on Precomputed Visibility,  Proceedings of Siggraph 2000.

 

Updated 12/07/00 10:35 AM , lastra@cs.unc.edu.