Schedule (class, lab)

Consider everything in the future as tentative, except for the due date of the next assignment.


Class Schedule

Class Day Date Topic Read by class time Assignment
1 Th 8-Jan Introduction  Chapter 1  
2 Tu 13-Jan Combinational Logic I  Chapter 2  
3 Th 15-Jan Combinational Logic II    
4 Tu 22-Jan Combinational Logic III  Chapter 3 (1-3) Lab 1 due
5 Th 24-Jan Combinational Design I  Chapter 3 (3, 5, 6) HW1 due
6 Tu 27-Jan Combinational Design II  Chapter 4 (1-5,8) Lab 2 due
7 Th 29-Jan  Arithmetic Circuits  Chapter 5  
8 Tu 3-Feb Sequential Design I  Chapter 6 (1-3) Lab 3 due
9 Th 5-Feb State Machines  Chapter 6 (4-5) HW2 due
10 Tu 10-Feb Counters, Video  Chapter 7 (1, 6) Lab 4 due
11 Th 12-Feb  Test 1    
12 Tu 17-Feb Registers II and Memories I Chap 7 (9) Chap 9 (1-3) Lab 5 due
13 Th 19-Feb Memories II    
14 Tu 24-Feb Misc. FPGA topics    
15 Th 26-Feb Datapaths I Chap 7 (2-6, 8) Chap 10  
16 Tu 2-Mar Datapaths II Chapter 10 (1-6) Labs 6-7 due
17 Th 4-Mar Transistors and VLSI    
  Tu 9-Mar Spring Break    
  Th 11-Mar Spring Break    
18 Tu 16-Mar Sequencing I Chapter 8  
19 Th 18-Mar Sequencing II    
20 Tu 23-Mar Keyboard, Memories and I/O   Lab 8 due
21 Th 25-Mar Memories and I/O, review   HW3 due
22 Tu 30-Mar Test 2   Lab 9 due
23 Th 1-Apr Sequencing III   Lab 10 due
24 Tu 6-Apr      
25 Th 8-Apr     Lab 11 due
26 Tu 13-Apr  no class    
27 Th 15-Apr  no class    
28 Tu 20-Apr      
29 Th 22-Apr      
  Tu 4-May Noon -- Exam    

Lab Schedule

Date Topic
9-Jan no lab today
16-Jan  Schematic capture and using the tools
25-Jan  Verilog and simulation (Modelsim)
30-Jan  Adder design and Verilog testbench
6-Feb  Digital lock
13-Feb  VGA timing generator
20-Feb  VGA Terminal
27-Feb  VGA Terminal
5-Mar  Basic MIPS datapath
12-Mar  Spring Break
19-Mar  lw and sw
26-Mar  beq
2-Apr  Add peripherals
9-Apr  Holiday -- no lab
16-Apr  Free to work on demo
23-Apr  Demo Final Project

 


Anselmo Lastra  (http://www.cs.unc.edu/~lastra)
Last modified Wednesday, March 31, 2004 09:50 AM
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