 
In the following, WH3 refers to the Weste Harris textbook.
 [10] WH3 Problem 1.16 (no tool, just paper and pen)
 [5] WH3 Problem 2.8 (short)
 [5] WH3 Problem 2.10 (short)
 [10] WH3 Problem 2.14
 [10] WH3 Problem 2.22
 [10] WH3 Problem 4.10
 [10] WH3 Problem 4.24
 [5] WH3 Problem 4.28 (short)
 [10] WH3 Problem 6.4
 [5] WH3 Problem 6.12 (short)
 [20] Develop a theory similar to Logical Effort, but which incorporates
energy consumption as well as delay. (If you only minimized energy
consumption, you will end up with minimum sizes for all transistors in your
circuit!) Suppose the metric to use is Energy * (delay^2). As
discussed in class, this metric is fairly invariant to voltage scaling.
Given a target load capacitance, and an initial input capacitance, how would
you modify the theory of Logical Effort to minimize not the path delay, but
the path delay squared times the total energy consumed?
The assignment is due in class on Tuesday, March 22, 2005.
