Disk Controller
The disk controller consists of a ROM that adds disk commands to
Extended Color BASIC, a disk controller chip, and a little glue to
make it all work.
The disk controller chip is a Western Digital 1793 (or 1773?),
and has four registers which can be accessed at addresses $FF48
through $FF4B inclusive.
There is also one control register at $FF40 that is not part of the
controller chip, that is used to enable the drive motors, select lines,
and so on.
Here is a map:
- $FF40 Control register
- $FF48 Command/Status register
- $FF49 Track register
- $FF4A Sector register
- $FF4B Data register
In general, you make the disk controller execute a command by writing
a command byte into the Command register, and see the results by
reading the Status register.
During the execution of a read command, you have to load data bytes
from the data register, where they appear as they come from the disk;
during a write, you have to put bytes into the data register from where
they will be written onto the disk.
The speed of reads and writes is constant; if your program does not
read or write bytes into the Data register quickly enough, the chance
is gone, and the command will not complete successfully.
Control Register
This is not part of the controller chip, but is part of the "glue"
that makes it all fit together.
You can force the drive motor to turn off by writing a zero into this.
You can also force the motor on by writing non-zero there, but the
documentation doesn't explain which bits do what.
Don't panic; more details are on the way.
This register is write-only; you can't tell what value was last written
there just by reading it.
So Disk BASIC probably keeps a copy in somewhere of each value that it
writes here.
This means that if your programs write here, it might confuse BASIC,
because the last thing it put here is no longer true.
Be careful about that.
Since this register is not part of the disk controller chip, there are
other things to be careful of as well.
For instance, the disk controller's Track register normally contains the
track number at which the disk drive head is positioned.
But if you have more than one disk drive, you can switch which one you
are using by writing some value into this Control register.
The disk controller does not know that it is now talking to a new disk drive,
and the head position of the new disk drive may be different from the old one.
So the controller might think it is at track 10, where the old drive was.
But maybe the new drive's head is over track 23.
As soon as the controller tries to execute any read or write command,
it will notice that the data coming from the disk drive is claiming
track 23, instead of the 10 it expected.
So the controller will return an error instead of executing the command.
more to come...
Track and Sector registers
The Track and Sector registers just hold track and sector numbers.
The Track register normally reflects the current position of the head;
you don't normally write into it.
To get to a track you use the Seek command and put the desired track
number in the data register.
When that command has completed successfully, the track number will
be in the Track register.
In contrast, the Sector register is used to tell the controller which
sector you want; you write into it.
You can, of course, write into the Track register.
But if it doesn't match the position of the head, the controller
will produce an error if you try to read or write a sector -
it notices that it is not at the track it expected.
Still, there is a good reason to write into the Track register if you
have more than one disk drive.
Whenever you select a new disk drive by writing into the Control register,
you may want to update the controller's Track register with the position
of the new drive.
Data Register
more to come...
Command/Status Register
Writing into this register gives a command to the disk controller chip.
Reading from it tells you the status of the command's execution.
In effect, this is two registers sharing the same address; the
Command register is write-only, and the Status register is read-only.
Command bits
There are four types of disk commands.
Type I - Restore, Seek, Step, Step In, and Step Out.
Type II - Read Sector and Write Sector.
Type III - Read Track, Write Track, and Read Address.
Type IV - Force Interrupt.
more to come...
Status bits
Bits in the error code are defined as follows.
(This info comes from the 1793 data sheet.)
The 1793 data sheet is more terse than the 1771 data sheet which was
mistakenly refernced before,
so I've filled in some missing descriptions in italics, like this;
some from the 1771 data sheet and others that just seem obvious.
Take those additions with a grain of salt, although I *think* they
are right.
Note that some of the bits have different meanings based on which type
of command caused them to be set.
The status word is defined only for commands of type I, II, and III.
The status of a type IV command, Force Interrupt, depends on the command
that was interrupted.
Signals are named from the perspective of the 1793 disk controller
chip, so "input" means input to that chip from either the computer
or the disk drive, and "output" means an output from the 1793 to
one of those.
Singal names preceded by an asterisk "*" indicate that the signal
is active-low, or inverted, so that "0" means true and "1" means false.
- 7 Not Ready
-
This bit, when set, indicates that the disk drive is not
ready.
When reset it indicates that the drive is ready.
This bit is an inverted copy of the READY input
from the disk drive and logically ORed with the
*MR (Master Reset) input signal.
Type II and III commands will not execute unless the drive
is ready.
- 6 Write Protect
-
Type I commands:
When set, indicates that Write Protect is activated.
This bit is an inverted copy of the *WRPT
(Write Protect) input from the disk drive.
Type II/III commands:
On Read Sector: not used. On Read Track: not used.
On any Write command, this bit indicates that the
diskette was write protected
so the write failed.
This bit is reset when updated.
- 5 Head Loaded/Record Type/Write Fault
-
Type I commands: Head Loaded
This indicates that the head is loaded and engaged,
and is a logical AND of the HLD (Head Loaded)
and HLT (Head Load Timing) input signals
from the disk drive.
Type II/III commands: Record Type/Write Fault
On Read Sector: it indicates the record-type code from
the data-field address mark.
0 = Data Mark, 1 = Deleted Data Mark.
On any Write: It indicates a write fault.
This bit is reset when updated.
- 4 Seek Error/Record Not Found
-
Type I commands: Seek Error
When set, the desired track was not verified.
This bit is reset to 0 when updated.
Type II/III commands: Record Not Found
When set, it indicates that the desired track, sector,
or side were not found.
This bit is reset when updated.
- 3 CRC error
-
Type I commands:
CRC error encountered in ID field
during track verification.
Type II/III commands:
If Bit 4 is set, an error was found in one or more ID fields;
otherwise, it indicates an error in data field.
(Each sector is written as an ID field followed by a
data field; each field contains a CRC, which is a kind
of checksum used as a sanity-check when reading.)
This bit is reset when updated.
- 2 Track 00/Lost Data
-
Type I commands: Track 00
When set, indicates Read/Write head is positioned to Track 0.
This bit is an inverted copy of the *TR00
(Track 00) input from the disk drive.
Type II/III commands: Lost Data
When set, it indicates that the computer did not respond
to the DRQ (Data Request) output in one byte time
and therefore that data was lost.
This bit is reset to zero when updated.
- 1 Index/Data Request
-
Type I commands: Index
When set, indicates index mark detected from drive.
This bit is an inverted copy of the *IP
(Index Pulse) input signal
from the disk drive.
Type II/III commands: Data Request
This bit is a copy of the DRQ output.
When set, it indicates that the DR (Data Register)
is full on a Read operation or the DR is empty on a
Write operation.
This bit is reset to zero when updated.
- 0 Busy
-
When set, command is under execution.
When reset, no command is under execution.
Back to my top-level CoCo page
24-Jun-99
yakowenk@csx.unxc.edu
(remove all "x"s to get a valid address)