SwTPcS/09 Dynamic Address Translation


The S/09 had a twenty-bit address bus, giving it 1048576 addresses. But it used the 6809 microprocessor, which had only 16 address lines. How did that work?

The magic part is called a DAT RAM - "DAT" stands for Dynamic Address Translation. This is a sixteen-byte RAM used in a clever way. Note that a RAM can be thought of as a translator of sorts - you put a binary number in (the address), and you get another binary number out (the data). This DAT RAM holds sixteen bytes, so it has four address lines and eight data lines. Its four address lines are hooked up to the 6809's top four address bits. So for any address put out by the 6809, the DAT looks at the top four address bits and outputs its own eight-bit pattern. Now those eight bits form the upper part of the twenty-bit address. The lower twelve bits are taken straight from the 6809's address bus. Here's a cheesey ASCII block diagram:


        +-----------------------------+
        |                             |
        |          6809 CPU           |
        |                             |
        | A15..A12   A11...........A0 |
        +-----------------------------+
           ||||        |||||||||||||
           ||||        |||||||||||||
           vvvv        |||||||||||||
        +----------+   |||||||||||||
        |  A3..A0  |   |||||||||||||
        |          |   |||||||||||||
        |  DAT RAM |   |||||||||||||
        |          |   |||||||||||||
        | D7....D0 |   |||||||||||||
        +----------+   |||||||||||||
          ||||||||     |||||||||||||
          ||||||||     |||||||||||||
          vvvvvvvv     vvvvvvvvvvvvv

         A19....A12  A11...........A0

Now we can think of the 6809's 64K address space as being chopped up into sixteen pages of 4K each. The address within a page is determined by the lower twelve bits of the 6809's address bus, and the page number is determined by the upper four bits.

Alternatively, we can think of the memory's 1M address space. The lower twelve bits of address output by the 6809 still give you the address within a page, but now the page number is the eight bits output from the DAT RAM. So there are 256 pages of memory, of which the 6809 can see only sixteen. Okay, so the DAT RAM translates the top part of the address. Why is that useful?

The extra address lines wouldn't do us any good if we were still stuck with just sixteen posssible bit patterns on those upper eight address lines. But since this DAT is a RAM and not a ROM, we can change its contents. When we want to work with this 64K of RAM, we write one bunch of patterns into the DAT RAM. When we want to work with that 64K, we write some other bunch of patterns. To do this, there is some special circuitry that turns on the DAT RAM's "write" input whenever the 6809 writes to addresses in the range of $FFF0 to $FFFF.

Now it is time for some terminology. The 16-bit addresses coming out of the 6809 will be called logical addresses. This is in contrast to the twenty-bit addresses that the main memory sees; those are called physical addresses. The idea is that the bytes coming from memory were chosen from some large physical memory, but at any one time the processor can only see some subset of that. It is like, on Friday, saying "tomorrow" to mean Monday. The real, physical, next day would be Saturday. But in the context of an ordinary business, the logical meaning of "tomorrow" might be "the next work day". In that setting, Saturday and Sunday are not counted. Similarly, the processor can only see a subset of the total physical memory that is out there, so that is its logical memory space; we don't count the memory that is out of reach.

Another important idea is a page of memory. This is just a 4K range of addresses, starting with an address that is evenly divisible by 4K. (Note that 4K is the same as $1000). So the memory at logical addresses $2000 through $2FFF is a page, as is the memory at physical addresses $1A000 through $1AFFF. But addresses $7654 through $8653 do not form a page, because $7654 is not evenly divisibly by 4K.

Okay, back to our discussion. Each byte of the DAT RAM controls the addressing for one 4K "page" of memory. There are 16 pages of RAM in the processor's logical address space, and for each one, the DAT RAM chooses one page of the 256 pages in the physical address space. For instance, the first DAT RAM byte controls the addressing for the first page of logical memory, at logical addresses $0000 through $0FFF. If we write a $23 into that first DAT RAM byte (ie: into address $FFF0), then whenever the processor reads or writes address $0xxx, the actual physical address that the memory board sees would be $23xxx. The DAT RAM effectively takes the first digit from the logical address, and replaces it by two digits of your choice, making a physical address.

So, we can write any sixteen bytes we want into the DAT RAM, to choose any sixteen physical pages to map in, one for each of the sixteen logical pages of RAM. They don't have to be in any order, they can be repeated, and they can even be physical page numbers for RAM that is not installed! Mapping in non-existant RAM is just like having no RAM installed at some logical addresses, like in a TRS-80 with only 4K of RAM.


Okay, now you know all of the basics. On to the complications.

First, I lied a little bit in the description up there. For technical reasons, the lower four bits of the DAT RAM's output are inverted. This means that if you write a $00 into it, it will later come out looking like $0F. So if you want to refer to physical page $43, you actually have to write $4C. This takes some getting used to.

Another complication is that some boards that are listening to the address bus are a little stupid. The I/O boards, for instance, ignore the top four bits of the physical address. If an I/O board is plugged into slot 3, it should listen to addresses $0E030. But since it is ignoring the top four bits, it will also respond when the address is $1E030, $2E030, and so on. And there are RAMs and ROMs on the CPU board itself that do the same thing with addresses $Fxxx; they respond to physical addresses $0Fxxx, $1Fxxx, $2Fxxx, and so on.

The final wrinkle is a kind of perverse safety feature. The DAT RAM itself can be written into at logical addresses $FFF0 through $FFFF. But the circuit that allows that writing sees the address bus before it goes through the DAT RAM. So when the processor writes to one of those addresses, it always writes into the DAT RAM, no matter what physical memory page is mapped into logical addresses $F000 through $FFFF. This is good, because if you could accidentally map out the DAT RAM, you would have no way to undo the mapping to bring it back - you would lose any chance to get at any RAM beyond the current set of logical pages. On the other hand, this is a kind of perverse safety, because it means that the DAT RAM is always there, waiting to be accidentally written into by a stray pointer in a user's program.

Overall, the DAT RAM is a cheap way to implement an elegant memory management scheme. One could imagine extending it to allow for more physical memory, or even some kind of memory protection to prevent user programs from causing troubles.


31-Oct-1998
yakowxenk@csx.unxc.edu
(remove all "x"s to get a valid address)