The SS-50 bus

The SS-50 was the main backplane in SwTPC machines, and connected the CPU board with memory, disk controllers, and so on. A typical small system had just three boards plugged into the SS-50: CPU, memory, and a disk controller. Physically, the SS-50 bus consisted of rows of male Molex connectors, spaced 0.156 inches apart. The boards that plugged into it had the corresponding female connectors along one edge, rather than the more modern (and cheaper) printed-circuit contacts.

It seems there were at least three versions of the SS-50 and SS-30 busses; one for the older 6800 systems, another (coming soon) for the newer 6809's, and still another for the paged-memory S/09 systems. Shown below is the older 6800-based version.

(Does anyone know exactly how many distinct versions of this thing are out there?)

  1. *D0 - (complement) data bus line 0
  2. *D1 "
  3. *D2 "
  4. *D3 "
  5. *D4 "
  6. *D5 "
  7. *D6 "
  8. *D7 - (complement) data bus line 7
  9. A15 - address bus line 15
  10. A14 "
  11. A13 "
  12. A12 "
  13. A11 "
  14. A10 "
  15. A9 "
  16. A8 "
  17. A7 "
  18. A6 "
  19. A5 "
  20. A4 "
  21. A3 "
  22. A2 "
  23. A1 "
  24. A0 - address bus line 0
  25. GND - ground
  26. GND - ground
  27. GND - ground
  28. +8V - power line
  29. +8V - power line
  30. +8V - power line
  31. -12V - power line
  32. +12V - power line
  33. INDEX - no pin - prevents backwards insertion
  34. *M.RST - (complement) manual reset
  35. *NMI - (complement) non-maskable interrupt
  36. *IRQ - (complement) interrupt request
  37. UD - user-defined
  38. UD - user-defined
  39. *Phase 2 - (complement) processor clock 2
  40. *VMA - (complement) Valid Memory Address
  41. R/*W - Read / (complement) Write
  42. *RESET - (complement) Reset or power-up
  43. BA - Bus Available for DMA
  44. *Phase 1 - (complement) processor clock 1
  45. *Halt - (complement) halts the processor
  46. 110b - 110 baud clock signal
  47. 150b - 150 baud clock signal
  48. 300b - 300 baud clock signal
  49. 600b - 600 baud clock signal
  50. 1200b - 1200 baud clock signal

The SS-30 Bus

I/O was handled on a distinct 30-pin bus (the SS-30), which was generally similar to the SS-50 but had a "board select" signal instead of the address bus. The logic to select individual I/O boards in the SS-30 was hardwired to memory-map them into four-byte slots starting with board 0 at address $8000.
  1. UD - user-defined
  2. UD - user-defined
  3. -12V - power line
  4. +12V - power line
  5. GND - ground
  6. GND - ground
  7. INDEX - no pin - prevents backwards insertion
  8. *NMI - (complement) non-maskable interrupt
  9. *IRQ - (complement) interrupt request
  10. RS0 - register select - like A0
  11. RS1 - register select - like A1
  12. D0 - data bus line 0
  13. D1 "
  14. D2 "
  15. D3 "
  16. D4 "
  17. D5 "
  18. D6 "
  19. D7 - data bus line 7
  20. *Phase 2 - (complement) processor clock 2
  21. R/*W - Read / (complement) Write
  22. +8V - power line
  23. +8V - power line
  24. 1200b - 1200 baud clock signal
  25. 600b - 600 "
  26. 300b - 300 "
  27. 150b - 150 "
  28. 110b - 110 baud clock signal
  29. *RESET - (complement) Reset or power-up
  30. Board Select

19-Nov-1997
yakowenk@csx.unxc.edu
(remove all "x"s to get a valid address)