WriteReg WriteData RegWrite Clock ReadReg1 ReadReg2 ReadData1 ReadData2

# $1 = 25
1 25 1 C 1 0 25 0

# $2 = 30
2 30 1 C 0 2 0 30

# $(N+1) = (N+1)
loop(N, 30)
	(N+1) (N+1) 1 C (N+1) (N) (N+1) (N)
end loop

# $(N+1) = N-60
loop(N, 30)
	(N+1) (N-60) 1 C (N+1) (N+1) (N-60) (N-60)
end loop

# Try writing to $0. This should not write anything
0 25 1 C 0 0 0 0

# try writing when RegWrite = 0
# (the registers should still have their old values)
loop(N, 30)
	(N+1) (N+80) 0 C (N+1) (N+1) (N-60) (N-60)
end loop
# x31, high bit and independent read ports
31 (-2147483648) 1 C 31 1 (-2147483648) (-60)
31 99 0 C 1 31 (-60) (-2147483648)
# Known value, then change write data without a rising edge
1 7 1 C 1 31 7 (-2147483648)
1 42 1 0 1 31 7 (-2147483648)
1 42 1 1 1 31 42 (-2147483648)
# Falling edge does not write
1 99 1 0 1 31 42 (-2147483648)
# Read selectors change with clock held low
1 99 0 0 31 1 (-2147483648) 42
0 123 1 C 0 31 0 (-2147483648)
