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Evaluating Security Specification
Mining for a CISC Architecture
C. Deutschbein, C. Sturton
IEEE International Symposium on Hardware Oriented Security and Trust
(HOST), 2020.
[Astarte tool]
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Multi-core Cyclic Executives for Safety-Critical Systems
C. Deutschbein, T. Fleming, A. Burns, S. Baruah
Science of Computer Programming. SCP 172.
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Mining Security Critical Linear Temporal Logic Specifications for
Processors
C. Deutschbein, C. Sturton
International Workshop on
Microprocessor and SoC
Test, Security, and Verification (MTV), 2018.
[Undine tool]
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End-to-End Automated Exploit Generation for Validating the Security of Processor Designs
R. Zhang, C. Deutschbein, P. Huang, C. Sturton
IEEE/ACM International Symposium on
Microarchitecture (MICRO), 2018. Nominated
for Best Paper award
[Coppelia tool]
[Website]
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Multi-core Cyclic Executives for Safety-Critical Systems
C. Deutschbein, T. Fleming, A. Burns, S. Baruah
Dependable Software Engineering. Theories, Tools, and Applications. SETTA 2017.
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Preemptive Uniprocessor EDF Schedulability Analysis with Preemption Costs Considered
C. Deutschbein and S. Baruah,
IEEE Real-Time Systems Symposium (RTSS), 2016.
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Performance and energy limits of a processor-integrated FFT accelerator
T. Thanh-Hoang, A. Shambayati, C. Deutschbein, H. Hoffmann and A. A. Chien
IEEE High Performance Extreme Computing Conference (HPEC), 2014