Mining Security Critical Linear Temporal Logic Specifications for
C. Deutschbein, C. Sturton
International Workshop on Microprocessor and SoC Test, Security, and Verification (MTV), 2018. To appear.
- End-to-End Automated Exploit Generation for Validating the Security of Processor DesignsR. Zhang, C. Deutschbein, P. Huang, C. Sturton IEEE/ACM International Symposium on Microarchitecture (MICRO) 2018. Nominated for Best Paper award
- A Recursive Strategy for Symbolic Execution to Find Exploits in Hardware Designs R. Zhang, C. Sturton ACM SIGPLAN International Workshop on Formal Methods and Security (FMS), co-located with PLDI 2018.
Identifying Security Critical Properties for the Dynamic Verification of a Processor
R. Zhang, N. Stanley, C. Griggs, A. Chi, C. Sturton
ACM Conference on Architectural Support for Programming Languages and Operating Systems (ASPLOS), 2017.
SPECS: A Lightweight Runtime Mechanism for Protecting Software from Security Critical Processor Bugs
M. Hicks, C. Sturton, S.T. King, J.M. Smith.
ACM Conference on Architectural Support for Programming Languages and Operating Systems (ASPLOS), 2015.