Publications
Security Properties for Open-Source Hardware Designs
J. Rogers, N. Shakeel, D. Mankani, S. Espinosa, C. Chabra, K. Ryan, C. Sturton
arXiv, December 2024.
Hardware Security Verification Benchmarks

SEIF: Augmented Symbolic Execution for Information Flow in Hardware Designs
K. Ryan, M. Gregoire, and C. Sturton
Hardware and Architectural Support for Security and Privacy (HASP), October 2023.
Nominated for Best Paper Award.

Sylvia: Countering the Path Explosion Problem in the Symbolic Execution of Hardware Designs
K. Ryan and C. Sturton
Formal Methods in Computer-Aided Design (FMCAD), October 2023.

An Intermediate Representation for Hardware Security Verficiation
R. Kastner, C. Sturton, C. Deutschbein, A. Meza, K. Ryan, F. Restuccia.
VLSI Test Symposium, 2023.

Selected Talks
Invited Talk: Bringing Symbolic Execution to the Security Verification of Hardware Designs
Workshop on Computer Architecture Research with RISC-V (CARRV), 2023. Co-located with ISCA.

Poster: Countering the Path Explosion Problem in the Symbolic Execution of Hardware Designs
K. Ryan and C. Sturton
Design Automation Conference (DAC), 2023.